Real Intent to Present at DVClub Shanghai on Sept. 26, 2014
SUNNYVALE, Calif. – September 19, 2014 –
Ramesh Dewangan, vice president of application engineering at Real Intent – whose advanced Ascentª and Meridianª verification solutions accelerate electronic design sign-off, eliminate complex failures in SoCs, and lead the market in performance, capacity, accuracy and completeness – will make a presentation at DVClub Shanghai next week.
Shortening Debug with New Methods in Static Verification. This informative half-hour presentation including a short question and answer period delves into the challenge of how to make the debug process efficient for functional verification. It provides an overview of new static verification techniques such as clock domain crossing analysis, reset optimization, X-optimism/pessimism, FSM integrity and others. These new techniques target specific problem domains to improve overall verification methodology in innovative ways never before imagined. Ramesh will cover how focused applications for specific problem areas yield maximum precision of results and speed of analysis with highest capacity. He will discuss smart hierarchical reporting as essential for prioritizing debug effort for maximum return-on-effort. He also will emphasize that solution orientation means designer productivity is key for managing verification debug complexity.
DVClub Shanghai is a technical workshop begun by verification engineers in China. Its principal goal is to help build the verification community. Through quarterly educational and networking events, DVClub promotes the communication of verification technologies and experiences between Chinese and global verification engineers. Its first event was held in March 2014.
Friday, Sept. 26, 2014 at 2:30
No 935 Huaihai Road Shanghai
Shanghai 200020 China
About Real Intent
Companies worldwide rely on Real Intent’s EDA software to accelerate early functional verification and sign-off of electronic designs. The company provides comprehensive CDC verification, advanced RTL analysis and sign-off solutions to eliminate complex failure modes of SoCs. Real Intent’s Meridian and Ascent product families lead the market in performance, capacity, accuracy and completeness. Please visit www.realintent.com for more information.
Real Intent and the Real Intent logo are registered trademarks, and Meridian and Ascent are trademarks of Real Intent, Inc. All other trademarks and trade names are the property of their respective owners.