Management

Dr. Prakash Narain’s career spans IBM, AMD and Sun where he got hands on experience with all aspects of IC design, CAD tools design and methodology. He was the project leader for test and verification for UltraSPARC IIi at Sun Microsystems. He was an architect of the Mercury Design System at AMD He has architected and developed CAD tools for test and verification for IBM EDA. Dr. Narain has a Ph.D. from the University of Illinois at Champaign-Urbana where his thesis focus was on algorithms for high level testing and verification.

Rajiv Kumar spent almost 12 years at Hewlett-Packard in both engineering and managerial capacities. During his tenure, he worked on several generations of the PA-RISC processor and HP’s high-end server systems. He also worked on the joint development of Itanium processor with the Intel engineering team. He was a key architect for HP’s transition from 32-bit to 64-bit platform where he led over 100 engineers in delivering HP’s first 64-bit system. Mr. Kumar holds graduate degrees in management from Stanford and in computer science from University of Oregon.

Dr. Chris Morrison was employee #2 at Real Intent. He brings over 22 years of EDA software engineering experience to the team. Previous to Real Intent he led the engineering development of clock tree generation and placement based optimization tools at Cadence Design Systems. Prior to that he worked at Viewlogic Systems. His PhD is from the University of Colorado and BSEE is from Yale University.

Mr. Emami has over 23 years of experience in sales and sales management in the EDA industry. He started his career with Meta-Software and was with the company through its IPO and acquisition by Avant!. Prior to joining Real Intent, he served as VP Worldwide Sales at Tera-Systems, Axiom DA and Tanner EDA and held the VP Japan Operations position while at Magma. Mr. Emami holds a BSEE degree from University of California, San Diego and an MBA from Santa Clara University.

Dr. Pranav Ashar brings two decades of EDA expertise to Real Intent. Pranav received his M.S. and Ph.D. in EECS with emphasis on EDA from the University of California, Berkeley in 1989 and 1991, respectively. He then joined NEC Labs in Princeton, NJ where he developed a number of EDA technologies that have influenced the industry. Pranav has authored about 70 publications in refereed conferences and journals with approximately 800 citations,and co-authored a book titled “Sequential Logic Synthesis”. He has 35 patents granted and pending, many of which have been licensedor part of business enablement. Pranav was an adjunct faculty in the CSEE department at Columbia University wherehe has taught graduate and undergraduate courses on VLSI design automation, VLSI Verification, and VLSI design.