Products2

Real Intent Product Families
Real Intent offers two product families – Ascent for early functional verification before synthesis; and Meridian for advanced sign-off verification not possible with simulation or static timing analysis.
Real Intent Products Info
Ascent for Early Functional Verification
Ascent Lint is the industry’s fastest and lowest-noise RTL lint solution. It includes smart rules that perform syntax and semantic checks for today’s complex System-on-Chip (SoC) designs. Ascent Lint is unique in the industry in terms of delivering high capacity, comprehensiveness and ease of debug.
Ascent Implied Intent Verification (IIV) is an early functional verification tool that automatically finds elusive bugs in RTL. It performs comprehensive verification using automatic check formulation followed by deep-sequential formal analysis. Ascent IIV can improve verification efficiency substantially and detect up to 50% of design functional errors prior to testbench development and simulation.
Ascent X-Verification System (XV) detects and isolates X-propagation issues early, in Verilog RTL. The masking of functional bugs (X-optimism) and the appearance of unnecessary X’s (X-pessimism) is eliminated at the RTL, prior to synthesis. Ascent XV analysis can catch issues before RTL sign-off, driving cost down, and avoiding the monotonous, error-prone debug at the netlist level.
Meridian for Advanced Sign-off Verification
Meridian CDC is the fastest, highest capacity and most precise CDC solution in the market. It performs comprehensive structural and functional analysis to ensure that signals crossing asynchronous clock domains on ASIC, or FPGA devices are received reliably. With a capacity exceeding 100M gates, Meridian CDC is the only solution that enables all aspects of CDC sign-off.

Meridian Constraints is the best in class, comprehensive constraint management solution in the market. It offers high performance constraint validation, template generation, coverage analysis, equivalence checking and timing exception verification capabilities designed to provide users with ultimate confidence in the timing constraints employed across all phases of the implementation flow.