DAC 2013 Real Intent Booth Appointment Signup
After reviewing the presentation abstracts please fill out the signup form below.
New Ascent Lint 2.0 Release with Advanced Debugging
We've taken the industry's fastest linter for clean RTL before simulation and synthesis to a new level. Since DAC 2012, more than 65 comprehensive unique rules have been added to Ascent Lint 2.0, while maintaining its analysis speed of 450M gates in less than one hour, with no need for hierarchical processing. See why Integrated Device Technology says "the product is easy to use and debug is fast and efficient." Come and preview our new 2013 release which expands our high coverage rule set and introduces new design source file functionality.
Meridian Clock Domain Crossing with Advanced Flows and Management Features
Meridian CDC continues to advance its market-leading speed, capacity and low-noise analysis of asynchronous clock domains in SoC designs. At DAC 2013, we preview in private meetings our next generation CDC management solution with a new waiver-free flow. You will not want to miss seeing the future for advanced sign-off.
Ascent XV: Complete Solution for X-Verification
Ascent XV provides a comprehensive solution and flow for making an RTL design X-robust. It enables clean RTL simulation in which performance and bug coverage is not impacted by X-effects. Unique reset analysis identifies uninitialized flops early in the design phase and suggests a minimal number of hardware resets for complete initialization which reduces routing overhead. The comprehensive X-hazard report identifies all X-sources, X-sensitive nets and ranks which nets to analyze first. The automatic generation of X-accurate models allows X-optimism functional bugs to be unmasked during RTL simulation. Ascent XV provides initialization and optimization capability for power-managed blocks to ensure that the combination of resets and retention flops are able to establish a known state. At the netlist level, Ascent XV identifies and corrects X-pessimism saving weeks on gate-level simulation. At DAC, discover the most comprehensive solution for X-verification.
Meridian Constraints: Comprehensive SDC Management and Verification
With Meridian Constraints, SDC is verified for completeness and correctness from design inception, through synthesis to back-end place and route. In a private meeting, preview our new interface which tightly integrates with the rest of your tool flow.
Ascent IIV: Automatic Detection of Functional Bugs Without a TestBench
Ascent IIV goes beyond Ascent Lint by leveraging formal techniques for functional verification. It uses the implied intent of the RTL to automatically formulate checks. Ascent IIV provides an immediate return on investment by quickly finding elusive bugs in RTL blocks and by pinpointing the root cause of the problem. Its smart reporting prioritizes your debug effort by marking up to 90% of the failures as secondary or duplicate, reducing the time spent on analysis. Discover the new 2013 release with substantial performance improvements, an improved reporting structure and important new FSM checks.
Joint Meridian CDC and DeFacTo SIGNOFF DFT Flow Presentation
For the first time, see a combined RTL sign-off flow for both CDC and DFT that accelerates the sign-off process. The new flow integrates DeFacTo's SIGNOFF RTL DFT evaluation and enhancement platform, with Real Intent's Meridian CDC, offering a best-in-class solution for SoC design teams worldwide. Schedule a Time.