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Benefits:
- Highest capacity to enable CDC verification on 100+M gate SoC designs
- Fastest performance for quick verification turnaround
- Most precise CDC reporting using crossing-based analysis
- Easiest-to-use CDC solution in the industry, template free
- Multiple technologies to enable complete CDC sign-off from RTL to netlist
Features:
- Automatic design environment capture from designs or SDC constraints
- Comprehensive clock intent inference and analysis catches clock and reset issues, hazard/glitch potentials, reconvergence and loss of correlation
- Metastability aware formal analysis verifies control and data stability for all data transfer protocols, gray code requirements
- Flexible top-down and bottom-up hierarchical analysis to accommodate different design methodologies
- SimPortal enables dynamic CDC verification
- Leading edge language support: Verilog, VHDL and SV with SVA constraints
Meridian CDC Data Sheet:
 English  Japanese
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