Innovating the Intelligence of Formal Techniques for Automatic Design Verification
Blog Archive
January 2012
1/24/2012: A Meaningful Present for the New Year
August 2011
8/02/2011: A Quick History of Clock Domain Crossing (CDC) Verification
July 2011
7/26/2011: Hardware-Assisted Verification and the Animal Kingdom
7/13/2011: Advanced Sign-off…It’s Trending!
May 2011
5/24/2011: Learn about Advanced Sign-off Verification at DAC 2011
5/16/2011: Getting A Jump On DAC
5/09/2011: Livin’ on a Prayer
5/02/2011: The Journey to CDC Sign-Off
April 2011
4/25/2011: Getting You Closer to Verification Closure
4/11/2011: X-verification: Conquering the “Unknown”
4/05/2011: Learn About the Latest Advances in Verification Sign-off!
March 2011
3/21/2011: Business Not as Usual
3/15/2011: The Evolution of Sign-off
3/07/2011: Real People, Real Discussion – Real Intent at DVCon
February 2011
2/28/2011: The Ascent of Ascent Lint (v1.4 is here!)
2/21/2011: Foundation for Success
2/08/2011: Fairs to Remember
January 2011
1/31/2011: EDA Innovation
1/24/2011: Top 3 Reasons Why Designers Switch to Meridian CDC from Real Intent
1/17/2011: Hot Topics, Hot Food, and Hot Prize
1/10/2011: Satisfaction EDA Style!
1/03/2011: The King is Dead. Long Live the King!
December 2010
12/20/2010: Hardware Emulation for Lowering Production Testing Costs
12/03/2010: What do you need to know for effective CDC Analysis?
November 2010
11/12/2010: The SoC Verification Gap
11/05/2010: Building Relationships Between EDA and Semiconductor Ventures
October 2010
10/29/2010: Thoughts on Assertion Based Verification (ABV)
10/25/2010: Who is the master who is the slave?
10/08/2010: Economics of Verification
10/01/2010: Hardware-Assisted Verification Tackles Verification Bottleneck
September 2010
9/24/2010: Excitement in Electronics
9/17/2010: Achieving Six Sigma Quality for IC Design
9/03/2010: A Look at Transaction-Based Modeling
August 2010
8/20/2010: The 10 Year Retooling Cycle
July 2010
7/30/2010: Hardware-Assisted Verification Usage Survey of DAC Attendees
7/23/2010: Leadership with Authenticity
7/16/2010: Clock Domain Verification Challenges: How Real Intent is Solving Them
7/09/2010: Building Strong Foundations
7/02/2010: Celebrating Freedom from Verification
June 2010
6/25/2010: My DAC Journey: Past, Present and Future
6/18/2010: Verifying Today’s Large Chips
6/11/2010: You Got Questions, We Got Answers
6/04/2010: Will 70 Remain the Verification Number?
May 2010
5/28/2010: A Model for Justifying More EDA Tools
5/21/2010: Mind the Verification Gap
5/14/2010: ChipEx 2010: a Hot Show under the Hot Sun
5/07/2010: We Sell Canaries
April 2010
4/30/2010: Celebrating 10 Years of Emulation Leadership
4/23/2010: Imagining Verification Success
4/16/2010: Do you have the next generation verification flow?
4/09/2010: A Bug’s Eye View under the Rug of SNUG
4/02/2010: Globetrotting 2010
March 2010
3/26/2010: Is Your CDC Tool of Sign-Off Quality?
3/19/2010: DATE 2010 – There Was a Chill in the Air
3/12/2010: Drowning in a Sea of Information
3/05/2010: DVCon 2010: Awesomely on Target for Verification
February 2010
2/26/2010: Verifying CDC Issues in the Presence of Clocks with Dynamically Changing Frequencies
2/19/2010: Fostering Innovation
2/12/2010: CDC (Clock Domain Crossing) Analysis – Is this a misnomer?
2/05/2010: EDSFair – A Successful Show to Start 2010
January 2010
1/29/2010: Ascent Is Much More Than a Bug Hunter
1/22/2010: Ascent Lint Steps up to Next Generation Challenges
1/15/2010: Google and Real Intent, 1st Degree LinkedIn
1/08/2010: Verification Challenges Require Surgical Precision
1/07/2010: Introducing Real Talk!

Ascent Lint Steps up to Next Generation Challenges

Shiva Borzin   Shiva Borzin
   Technical Marketing Manager

The key to greater design productivity is to detect bugs as early as possible and as close to their source as possible. Lint is the first and critical component of the early-verification tool chain. It is easy to use and finds nontrivial bugs that can save your bacon later on. Real Intent has been a pioneer in developing technologies for early verification and in promoting the paradigm.  Earlier this week, in response to customer demand, we announced the release of Ascent Lint 1.2, the next generation lint tool that performs smart syntax and semantic lint checks for complex designs.  While there is a variety of lint and RTL code analysis tools available, Real Intent has stepped up to introduce a distinctive lint tool to address the serious deficiencies in the existing lint offerings.

First a little bit of history: Real Intent tools have always used lint technology to check the design prior to formal verification, and issued violation messages about the design to the user in a log file.  Over the years, upon customer requests, Real Intent exposed more information in a debug-able report file.  Sure enough, it was encouraging to hear from our customers that the Real Intent tool front-end was able to catch crucial issues which some of the lint tools in the market did not. Real Intent has always maintained close relationships with its customers. Ascent Lint 1.2 is a product of these relationships. 

Customer feedback indicates that as design complexity has increased, popular lint tools in use today are starting to show signs of severe performance degradation and noise.  The lint reports generated by some tools have become cumbersome due to the large number of irrelevant messages generated by them.  While some lint tools offer the option of custom rules creation by reusing source code from prepackaged rules, common experience is that the rule language is pretty inscrutable and rules are complex to implement.  Also, if implemented in TCL, these custom rules can run very slowly.

Real Intent’s Ascent Lint speeds up the development of complex system-on-chip (SOC) designs by offering the ability to select from a comprehensive set of smart rules based on industry guidelines.  These rules are implemented in an extremely fast engine with runtimes as fast as about a minute for checking 230 of our most comprehensive  rules on a million gate design. This data point was obtained at a customer site and turned out to be a real eye opener for the customer deeply frustrated with the performance of their existing lint tools. Ascent Lint offers low noise, yet comprehensive reporting which is debug-able through a GUI with cross-probing capability to the design source.  Ascent Lint enables customization of company-specific guidelines by graphically configuring existing rules simply by choosing or entering values in a box. We are committed to continue to provide smart industry-standard and customized rules that detect complex design and coding bugs.

As we see other lint offerings falling off a cliff in the face of rich HDLs and design complexity, we believe that Ascent Lint will be the next generation technology that saves the day.

See a couple of other blogs on Ascent Lint:

http://www.cvcblr.com/blog/?p=99

http://www.techbites.com/201001191803/myblog/blog/z000c-wow-low-noise-and-high-performance-code-linting.html

Jan 22, 2010

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