Real Intent Verification News
  Winter 2018  
  In this issue, we bring you…  
 
  • Letter from our CEO, Prakash Narain
  • Recent New Product – Verix CDC
  • John Cooley on Real Intent: videos from DAC, Ascent Lint/AutoFormal evaluation
  • New Webinars available
  • New Videos available
  • New Whitepapers available
  • Links to press coverage
  • Upcoming Events
 
 

Letter from our President & CEO, Prakash Narain, Ph.D.

 
 


Real Intent enjoyed a very busy and productive 2017. We participated in a number of technical conferences and exhibitions through the year, introduced Meridian RDC for comprehensive RDC sign-off, and launched our new Verix CDC product, our new multi-mode CDC sign-off solution - the first in a new family of products.

You will be seeing a lot more product innovation from Real Intent in the coming year. We will continue to focus on the best solutions to address the difficult verification challenges surrounding early functional verification and static sign-off. In addition to making more products available in the Verix family, we will continue to expand and improve the Ascent and Meridian families.

We look forward to seeing many of you at industry events this year, including DVCon 2018, Verification Futures, SemIsrael, DAC, as well as many other industry-sponsored events.

We wish you the best in 2018!

 
 

Verix CDC – The first-to-market multimode CDC solution

 
 

The new Verix product family was announced at the 2017 Design Automation Conference in Austin in June.  It initially offers Verix CDC, the first complete multi-mode clock-domain crossing (CDC) sign-off solution for RTL designs.  It provides one-step analysis and debug of all operating modes in an IC, and boosts productivity for SoC and FPGA design teams. It also maintains Real Intent's product leadership in delivering what the company believes is the industry's fastest-performance, highest-capacity and most precise CDC solution in the market. For more on Verix CDC read the whitepaper, data sheet and press release.

 
 

John Cooley on Real Intent

 
 

If you missed John’s Troublemakers panel at DAC, Prakash has some interesting points to make on the company’s growth and its products vs. Spyglass.

John also evaluates CDC tools; see what he has to say about Verix CDC

In Deep Chip, a user writes an evaluation of AutoFormal and Ascent Lint used on IP targeted to fit onto the 28nm Xilinx Kintex 7. The IP is a 10GbE MAC written in 200,000 lines of Verilog RTL.

 
 

Webinars Available Online

 
 

If you missed them, here are links to webinars we held this year:

True Multimode CDC Sign-off, with Vikas Sachdeva, Senior Technical Marketing Manager

Modern SoC designs have many subcomponents with varying degrees of complexity and configurability, which leads to a large number of operating modes and scenarios. Ensuring these complex SoCs work according to specifications, in all operating modes with numerous asynchronous clock interactions, is an incredibly challenging problem. If not addressed proactively, this can result in chip failures in the field that are difficult to diagnose and expensive to fix.

This webinar explains typical approaches designers take currently to verify CDC in multimode context and risks associated with these approaches. It introduces Real Intent’s revolutionary true multimode CDC sign-off methodology.

Solving the Reset Design Challenges of Today’s SoCs, with Sanjay Thatte, Senior Technical Marketing Manager

With advanced system requirements, resets play an important role in software control, power saving, and debugging of the system. If not addressed proactively, RDC can result in chip failures in the field that are difficult to diagnose and expensive to fix. This webinar illustrates various reset problems through design examples to show how to deploy effective strategies to guarantee complete RDC correctness. We introduce a methodology to create reset domains, enable precise and low-noise RDC analysis, and perform efficient debug.

 
 

Real Intent Videos

 
 

Introducing Verix CDC: True Multimode CDC Sign-off: Vikas Sachdeva, Senior Technical Marketing Manager at Real Intent, answers some questions about Verix CDC, Real Intent's new Multimode CDC sign-off solution.

Real Intent Q&A: Hierarchical CDC Explained: Roger Hughes, Director of Applications Engineering at Real Intent, answers some questions about Hierarchical CDC.

Real Intent Q&A: Reset Domain Crossing (RDC) Explained: Sanjay Thatte, Senior Technical Marketing Manager at Real Intent, answers some questions about Reset Domain Crossing.

 
 

New Whitepapers Available

 
 

Bulletproofing FSM Verification: The Ascent AutoFormal white paper – Comprehensive verification of Finite State Machines (FSMs) is essential because they control most aspects of the functionality of a design. While simulation is irreplaceable for verifying functionality, it is only as good as its stimulus. This paper discusses how to automate formal verification of corner case chip killers of an FSM design – namely that the FSM will not lock up, is not subject to metastability on reset deassertion, and that synthesis directives hold true.

True Multimode CDC Sign-off: The Verix CDC white paper – To avoid silicon failures, CDC sign-off across all operating modes is a requirement in today's SoCs. Verix CDC, with its unique static intent verification technology, is the only solution that holistically analyzes all modes in one run, and enables true multimode CDC sign-off.

The Next Step in High-Reliability FPGA Sign-off – FPGA designs are often used in mission-critical applications where they must perform without failure.  Real Intent’s Meridian and Ascent verification products step up the FPGA design verification by introducing the new FPGA library support in all of our products in 2017.

 
 

Recent Press Coverage

 
 

DeepChip, October 27, 2017
DeepChip: One users eval of Real Intent AutoFormal and Ascent Lint

DeepChip, October 13, 2017
DeepChip: Cliff Cummings on Real Intent

DeepChip, September 22, 2017
DeepChip: Prakash sees 3X revenue in 2017

EDA Café, September 14, 2017
Real Intent: Leveraging on Investments

Electronic Engineering Journal, August 28, 2017
EE Journal: Clocks, Xs, and Resets: Real Intent Discusses New Solutions

 
  Upcoming Events  
 
We will be exhibiting at DVCon 2018 in San Jose from February 26-28. Come visit us at booth 402!
 
 

For more information, visit realintent.com


Real Intent, Inc. 932 Hamlin Court, Sunnyvale CA 94089