Real Intent Announces Intent-Driven Verification

Receives $4 Million Funding to Commercialize a New Functional Verification Approach EDA Users from Sun and HP Found Company

April 24, 2000- Real Intent Inc., a new electronic design automation (EDA) company, announced today that it is creating an Intent-Driven Verification (IDV) approach that fundamentally alters the way functional verification is done today. The Company also announced that it has raised over $4 million in private funding to commercialize its verification technology.

The company was founded in July 1998 by Dr. Prakash Narain, CEO, and Rajiv Kumar, COO, EDA tool users from Sun (NASDAQ: SUNW) and HP (NYSE: HWP), respectively.

Real Intent's goal is to develop and market easy-to-use products that verify that the design implements the designer's intent, at the earliest opportunity in the design cycle. These products enable chip designs to rapidly reach quality goals with dramatically reduced effort. They address problems with conventional simulation-based approaches that are testbench limited and require a large amount of resources for simulation and debugging.

The founders, Narain and Kumar, began their Company with the belief that the origin of all design bugs lies in the fact that the structural RTL does not accurately implement the design’s intent.

According to Dr. Narain, CEO of Real Intent, "From day one, our focus has been on developing a designer-friendly way to exploit that intent-gap and use that to drive the verification process. We set out to design an environment for managing and verifying the design intent and we are very excited to report that beta results to date indicate that we have met these goals. Our approach to functional verification promises to revolutionize the design verification industry."

Narain continued, "We have assembled a very talented team which includes five PhDs with a wealth of experience in chip design and EDA technologies. We have a strong and active board of directors that that is chaired by industry visionary Dr. Prabhu Goel, the founder and CEO of Gateway Design Automation, whose Verilog simulator has become a worldwide standard."

"When we created the Verilog language, all of the verification aspects that we wanted to create have never been fully addressed,” stated Real Intent’s Board chairman, Dr. Goel. “Real Intent is carrying on that work and using it to address the verification challenge in a very promising way."

About Real Intent and the Company’s founders
Dr. Prakash Narain and Rajiv Kumar co-founded Real Intent. Their goal was to develop technology for intent-driven validation. As a user of EDA tools on leading-edge designs, Narain was frustrated with the conventional testbench-limited methodology that requires enormous vector generation and debugging effort. Hence, a significant amount of expensive design and verification engineering resources are needed produce results in this cumbersome and slow process. He wanted to develop tools that streamline the verification process and therefore achieve quality levels rapidly and with a reduced resource requirement.

Narain has hands on experience with all aspects of IC design, CAD tools design and usage. He was the project leader for test and verification for UltraSPARC IIi, at Sun Microsystems. His work resulted in the filing of two patent applications. He was an architect of the Mercury Design System that was a top-ten AMD goal for 1995. The project was chartered to create a new design methodology to double the efficiency of the design process. He has architected and developed CAD tools for test and verification for IBM EDA. Dr. Narain has a Ph.D. from the University of Illinois at Champaign-Urbana where his thesis focus was on algorithms for high level testing and verification.

Kumar brings 12 years of experience at Hewlett-Packard in both engineering and managerial capacities. During his tenure, he has worked on the PA-RISC processor and its optimizing compilers. He helped specify the IA-64 processor along with the Intel engineering team. Most recently, he was a key architect for HP’s transition from 32-bit to 64-bit platform where he led over 100 engineers in delivering industry's leading performance on HP's 16-way SMP system. He holds graduate degrees in management from Stanford and in Computer Science from University of Oregon. He also holds two patents on compiler technology and has published research papers.