JOB SPECIFICATION
Develops breakthrough formal software, in a fast-paced small team environment, to speed the electronic design process from design to implementation.

REQUIREMENTS:

•	Expertise in C/C++, Verilog and VHDL, digital design, simulation
•	Knowledge in formal verification techniques, SAT based engines, BDD, Symbolic, ATPG
•	Ph.D. EE/CS

Email Resume To:
jobs@realintent.com

Or Mail to Human Resources at:
Real Intent
505 North Mathilda Avenue
Suite 210
Sunnyvale, CA 94085