Advisory Board

Dave Stiles
Founder, Siara Systems, Entrepreneur at Large

Most recently, Dave Stiles served as the Chief Architect at Redback Networks, where he was responsible for integrating high-performance silicon, system hardware and software to deliver next-generation products. Prior to Redback Networks, he was a founder of Siara Systems and Cerent Corporation. Before joining Cerent Corporation, Mr. Stiles was at Nexgen developing Advanced Processor Architectures and leading silicon development teams that spawned the development of the AMD K6. Mr. Stiles holds BS and MS degrees in Electrical Engineering & Computer Sciences from MIT.

Dr. Rajesh Gupta
Qualcomm Professor, UC San Diego

Professor Gupta joined the UCSD faculty in November 2002, and in May, became the first occupant of the Qualcomm Endowed Chair in Embedded Microsystems. Previously, he taught at UC Irvine, where he arrived in 1996 after spending three years at the University of Illinois at Urbana-Champaign. He received his Ph.D. in Electrical Engineering from Stanford University in 1993.

From 1986-89, he was a senior design engineer at Intel Corporation. In 1995, Gupta was the recipient of a five-year NSF CAREER Award, for architecture and synthesis of embedded systems. Among professional activities, he is the Editor-in-Chief of IEEE Design and Test of Computers, and at UC Irvine was Cal-(IT)2's layer leader in charge of Interfaces and Software Systems. Gupta is author or co-author of three patents and over 120 research articles. He wrote "Co-Synthesis of Hardware and Software for Digital Embedded Systems" (Kluwer 1995).

Dr. Masahiro Fujita
Professor, University of Tokyo

Prof. Fujita received his Ph.D. from the University of Tokyo in 1985. He is a Professor in VLSI Design and Education Center (VDEC) at the University of Tokyo. Prior to joining the University of Tokyo in 2000, he was Director of CAD in Fujitsu Laboratories of America for 6 years. He has done innovative work in the areas of digital design verification, synthesis, and testing. He has co-authored 6 books, and has over 150 publications. He has participated and chaired many prestigious conferences in CAD and VLSI designs. His current research interests include synthesis and verification in higher level design stages, hardware/software and digital/analog co-design.